The invention relates to a filter circuit in an integrated device of the type comprising MOS transistors powered via two terminals, one of which (positive) is referred to as VDD while the other terminal, carrying the reference voltage zero, is referred to as VSS, which filter circuit comprises two MOS transistors, the gate of each transistor being connected to the drain of the other transistor.
In a general sense, it is often desirable to filter signals at a predetermined stage of processing in an integrated device, on the one hand in order to eliminate parasitic signals which are liable to produce error signals on the output and/or on the other hand to avoid the destruction of vulnerable elements of the device during the passage of high amplitude parasitic signals. It is to be noted that MOS transistors are known to be very vulnerable because of their gate electrode. This electrode is actually isolated from the substrate by way of a thin dielectric layer which is liable to be pierced in an irreversible manner when voltages in excess of a few tens of volts are applied.
In an integrated device usually a protection element, for example a zener diode, is provided in the direct vicinity of the signal input terminals and possibly the output terminals in order to limit the voltage across each terminal to a suitable maximum value, the useful signals, having an amplitude which is lower than this maximum value, not being affected by this protection element. The digital processing of the signals may also involve one or more filtering steps in order to eliminate the noise contained in the input signals, thus reducing the risk of incorrect output results due to the noise or parasitic signals.
It will be apparent that a filter circuit which serves to eliminate noise signals having a frequency which is higher than the operating frequency (for example, a low pass filter) inherently tends to reduce the amplitude and hence protect the vulnerable elements of the integrated device, at least in as far as very brief parasitic signals are concerned.
A filter circuit of the kind set forth is known from French Patent Specification No. 2,045,050.
This document describes how a signal can be shaped by application to a filter circuit having a hystersis response curve as well as the properties of an RC-type low-pass filter.